Key Metrics
CiteScore 

3.4
SJR 

Q3Electrical and Electronic Engineering

SNIP 

0.95
Recommended pre-submission checks
Powered by 

Topics Covered on IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Journal Specifications
Indexed in the following public directories
Web of Science
Scopus
Inspec
SJR
| Overview | |
| Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
| Language | English |
| Frequency | Continuous publication |
| General Details | |
| Language | English |
| Frequency | Continuous publication |
| Publication Start Year | 2018 |
| Publisher URL | Visit website |
| Website URL | Visit website |
View less
Planning to publish in IEEE Solid-State Circuits Letters ?
Upload your Manuscript to get
- Degree of match
- Common matching concepts
- Additional journal recommendations

Recently Published Papers in IEEE Solid-State Circuits Letters
A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
On-Chip Charge-Trap-Transistor-Based Mismatch Calibration of an 8-Bit Thermometer Current-Source DAC
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 112-Gb/s PAM4 Receiver With a Phase Equalization AFE in 7-nm FinFET
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 39.4mW 300MHz-BW 70.9dB-SNDR Hybrid ADC With Resistive Input and 200fs,rms-Jitter Tolerance
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A Logic-Compatible 2-Transistor Embedded Bipolar RRAM MACRO: A 28-nm Multiple-Time Programmable (MTP) Memory Without Extra Masks
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
On-Chip Charge-Trap-Transistor-Based Mismatch Calibration of an 8-Bit Thermometer Current-Source DAC
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 0.19-PEF Bandwidth/Power Scalable Dynamic Amplifier
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 112-Gb/s PAM4 Receiver With a Phase Equalization AFE in 7-nm FinFET
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 28-nm Digital Compute-in-Memory Ising Annealer With Asynchronous Random Number Generator for Traveling Salesman Problem
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
A 39.4mW 300MHz-BW 70.9dB-SNDR Hybrid ADC With Resistive Input and 200fs,rms-Jitter Tolerance
- 1 Jan 2026
- IEEE Solid-State Circuits Letters
FAQs on IEEE Solid-State Circuits Letters
How long has IEEE Solid-State Circuits Letters been actively publishing? 
What is the publishing frequency of IEEE Solid-State Circuits Letters? 
How many articles did IEEE Solid-State Circuits Letters publish last year? 
What is the eISSN & pISSN for IEEE Solid-State Circuits Letters? 
What is Citescore for IEEE Solid-State Circuits Letters? 
What is SNIP score for IEEE Solid-State Circuits Letters? 
What is the SJR for IEEE Solid-State Circuits Letters? 
Who is the publisher of IEEE Solid-State Circuits Letters? 
Check if your manuscript is a good match for
undefined
Upload your manuscript to get recommendations of journals
that have published papers similar to your manuscript
Drag and drop your file here
We accept manuscripts in English. File format: .doc and .docx | Maximum size: 10 MB | Word count: 200-300,000 words | File length: less than 100 pages
Do not have a manuscript right now? Use an abstract or summary