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eISSN: 2569-2925
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IACR Transactions on Cryptographic Hardware and Embedded Systems Key Metrics
CiteScore 
9
SNIP
3
Topics Covered on IACR Transactions on Cryptographic Hardware and Embedded Systems
Search algorithm
Block cipher
Handle
Masking countermeasure
General polynomial
Deep learning
Return address stack
Reverse engineering
NTRU
Bluetooth Low Energy
Formal verification
Hash table
Key generation
IACR Transactions on Cryptographic Hardware and Embedded Systems Journal Specifications
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SJR
| Overview | |
| Publisher | Ruhr-University of Bochum |
| Language | English |
| Publication Time | 11 |
| Editorial Review Process | Double blind peer review |
| General Details | |
| Language | English |
| Society/Institute/Sponsor | International Association for Cryptologic Research |
| Website URL | Visit website |
| Publication Details | |
| Publication Time | 11 |
| Editorial Review Detail | |
| Information for authors | |
| Author instructions | Visit website |
| Copyright Details | Visit website |
| License type | CC BY |
| OA statement | Visit website |
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Recently Published Papers in IACR Transactions on Cryptographic Hardware and Embedded Systems
Extending Randomness-Free First-Order Masking Schemes and Applications to Masking-Friendly S-boxes
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
OT-PCA: New Key-Recovery Plaintext-Checking Oracle Based Side-Channel Attacks on HQC with Offline Templates
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Random Probing Security with Precomputation
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Full Key-Recovery Cubic-Time Template Attack on Classic McEliece Decapsulation
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
A High-performance NTT/MSM Accelerator for Zero-knowledge Proof Using Load-balanced Fully-pipelined Montgomery Multiplier
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Bit t-SNI Secure Multiplication Gadget for Inner Product Masking
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Extending Randomness-Free First-Order Masking Schemes and Applications to Masking-Friendly S-boxes
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
OT-PCA: New Key-Recovery Plaintext-Checking Oracle Based Side-Channel Attacks on HQC with Offline Templates
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Random Probing Security with Precomputation
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Full Key-Recovery Cubic-Time Template Attack on Classic McEliece Decapsulation
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
A High-performance NTT/MSM Accelerator for Zero-knowledge Proof Using Load-balanced Fully-pipelined Montgomery Multiplier
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
Bit t-SNI Secure Multiplication Gadget for Inner Product Masking
- 9 Dec 2024
- IACR Transactions on Cryptographic Hardware and Embedded Systems
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FAQs on IACR Transactions on Cryptographic Hardware and Embedded Systems
How many articles did IACR Transactions on Cryptographic Hardware and Embedded Systems publish last year? 
In 2023, IACR Transactions on Cryptographic Hardware and Embedded Systems publsihed 80 articles.
What is Citescore for IACR Transactions on Cryptographic Hardware and Embedded Systems?
Citescore for IACR Transactions on Cryptographic Hardware and Embedded Systems is 9.
What is SNIP score for IACR Transactions on Cryptographic Hardware and Embedded Systems?
SNIP score for IACR Transactions on Cryptographic Hardware and Embedded Systems is 3.
Who is the publisher of IACR Transactions on Cryptographic Hardware and Embedded Systems?
Ruhr-University of Bochum is the publisher of IACR Transactions on Cryptographic Hardware and Embedded Systems.
